| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a non-volatile memory cell array having high operation speed and a low programming voltage. <P>SOLUTION: The non-volatile memory cell array comprises a first gate insulation film formed on the surfaces of first channel forming regions disposed on a semiconductor with prescribed intervals in parallel with a row direction, a first gate electrode formed via the first gate insulation film, a first electric charge accumulation layer having an electric charge retaining capability which comprises a plurality of dielectric films or floating gates, disposed adjacent to both sides of sidewalls extended in the row direction of the first gate oxide film and in parallel with the row direction, a second gate electrode formed via the first electric charge accumulation layer, and a pair of source and drain regions which are disposed between semiconductor element isolation regions disposed in a column direction crossing at right angles with the first gate electrode and are interposed between the semiconductor element isolation regions and the first electric charge accumulation layer. The source and the drain regions have a plurality source lines which mutually connect the source region in the column direction and a plurality of bit lines which mutually connect the drain region in the column direction. The source lines and the bit lines are alternately disposed in the column direction. <P>COPYRIGHT: (C)2003,JPO</p> |
