发明名称 CIRCUIT AND METHOD FOR DETECTING PLL SYNCHRONIZATION IN MAGNETIC TAPE DRIVE
摘要 <P>PROBLEM TO BE SOLVED: To attain the pull-in of a PLL by evading a read error even though a data period on a magnetic tape is narrowed, etc., due to the read of a mag netic tape drive. <P>SOLUTION: The PLL is constituted by a phase comparator 10, a low-pass filter 20 and a VCO circuit 40, then comparators 60, 61 for comparing a slice voltage with an output of a peak hold circuit 50 which replaces a VCO control voltage signal outputted from the filter 20 with a DC signal, and a counter circuit 70 for detecting that an EXOR gate 62 taking the exclusive OR of outputs of the comparators 60, 61 is set to HIGH for a specified time, are furnished, then the mode is changed over from a 1st synchronizing mode making the filter 20 have high gain before the specified number of data are read from the start in the read of the magnetic tape, to a 2nd synchronizing mode making the filter 20 have low gain by an output of the counter circuit 70, by a gain switching device 30 when the number of retrying times of the data read of the magnetic tape drive reaches the specified number. <P>COPYRIGHT: (C)2003,JPO
申请公布号 JP2003249036(A) 申请公布日期 2003.09.05
申请号 JP20020048455 申请日期 2002.02.25
申请人 NEC CUSTOM TECHNICA LTD 发明人 WATABE MANABU
分类号 G11B20/14;H03L7/093 主分类号 G11B20/14
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