发明名称 FLOOR PLANNING FOR PROGRAMMABLE GATE ARRAY HAVING EMBEDDED FIXED LOGIC CIRCUITRY
摘要 Interconnecting logic provides connectivity of an embedded fixed logic circuit, or circuits, with programmable logic fabric of a programmable gate array such that the fixed logic circuit functions as an extension of the programmable logic fabric. The interconnecting logic includes interconnecting tiles and may further include interconnecting logic. The interconnecting tiles provide selective connectivity between inputs and/or outputs of the fixed logic circuit and the interconnects of the programmable logic fabric. The interconnecting logic, when included, provides logic circuitry that conditions data transfers between the fixed logic circuit and the programmable logic fabric. The invention is directed towards the various needs and requirements of the layout and floor planning of a device having both fixed logic circuitry and programmable logic circuitry. The various designs are geared towards many goals including allowing fail-safe operation, facilitating the ease of interface between fixed logic circuitry and programmable logic fabric, among other issues.
申请公布号 WO03073620(A1) 申请公布日期 2003.09.04
申请号 WO2003US04955 申请日期 2003.02.21
申请人 XILINX, INC. 发明人 ANSARI, AHMAD, R.;DOUGLASS, STEPHEN, M.
分类号 H01L21/82;H03K19/173;H03K19/177;(IPC1-7):H03K19/177 主分类号 H01L21/82
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