发明名称 FLIP-FLOP WITH TRANSMISSION GATE IN MASTER LATCH
摘要 A method and apparatus for storing data in a master flip flop, comprising in combination receiving a clock signal having a first and second state, storing a master data state in a master storage device having a master storage input and a master storage output, storing a master complement data state in a master complement storage device having a master complement storage input and a master storage complement output, receiving a data input signal by a transmission gate, receiving a complement data input signal by a complement transmission gate, overriding the master storage complement output with the data input signal when the clock is in the first state, overriding the master storage output with the complement data input signal when the clock is in the first state, disconnecting the master storage complement output from the data input signal when the clock is in the second state, and disconnecting the master storage output from the complement data input signal when the clock is in the second state. The set-up time for the transmission gate is less than two transistor gate delays.
申请公布号 WO03073613(A1) 申请公布日期 2003.09.04
申请号 WO2003US05587 申请日期 2003.02.25
申请人 HONEYWELL INTERNATIONAL INC. 发明人 FULKERSON, DAVID, E.
分类号 H03K3/012;H03K3/037;H03K3/356;H03K3/3562;(IPC1-7):H03K3/356 主分类号 H03K3/012
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