发明名称 Automatic equalization circuit and receiver circuit using the same
摘要 A demodulation circuit for demodulating a multilevel digital modulation signal. Only an in-phase or quadrature component of the training signal generated in the demodulation circuit is used for equalization convergence. Tap coefficients of an equalizing training equalizer are updated by supplying either the in-phase or quadrature component so that the calculation amount can be reduced. When the equalization convergence is established, the obtained tap coefficients are rotated in phase and set to a data reproduction equalizer.
申请公布号 US2003165191(A1) 申请公布日期 2003.09.04
申请号 US20010822272 申请日期 2001.04.02
申请人 KOKURYO YOSHIRO;TSUKAMOTO NOBUO;HAMAZUMI HIROYUKI 发明人 KOKURYO YOSHIRO;TSUKAMOTO NOBUO;HAMAZUMI HIROYUKI
分类号 H04L25/03;(IPC1-7):H04L27/06;H04L27/14;H04L27/22 主分类号 H04L25/03
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