| 摘要 |
The present invention offers a low cost, reliable, on chip implementation that takes advantage of circuitry already present in receivers to calibrate and correct for gain and phase errors in a transceiver device. The present invention employs a digital signal processor along with multiple phase shifters and all pass networks to ensure proper levels of quadrature signals within the transceiver. An internally generated double sideband suppressed carrier signal is created to produce the calibration signals used by the digital signal processor.
|
