发明名称 Integrated circuit defect detection system
摘要 An N<2> algorithm for optimizing correlated events, applicable to the optimization of the detection of redundant tests and inefficient tests (RIT's), is disclosed. This algorithm represents a set of N tests with L defects as N L-dimensional correlation vectors. The N<2> algorithm optimizes in terms of the minimum set of vectors, and the set of vectors that take the minimum time to detect the L defects. The minimum set optimization (100) determines a set of vectors (tests) that contains the minimum number of vectors (tests) by analyzing the correlation among the N vectors. This minimum set optimization provides the minimum test set containing all defects in an algorithm that takes O(N<2>) operations. The minimum time optimization (200) determines a sequence of vectors (tests) that will detect the defects in a minimum amount of time. Taking into the account of the different execution time of each vector (test), the algorithm analyzes the complicated correlation among the vectors (tests) and gives an optimized sequence of vectors (tests) within O(N<2>) operations. The optimized sequence of vectors (tests) takes a minimum amount of time to find all the defects. <IMAGE>
申请公布号 EP1327890(A3) 申请公布日期 2003.09.03
申请号 EP20020258130 申请日期 2002.11.26
申请人 AGILENT TECHNOLOGIES, INC. 发明人 WU, KANG;STIRRAT, SUSAN L.
分类号 G01R31/3183;G06F11/22;H01L21/66;(IPC1-7):G01R31/318 主分类号 G01R31/3183
代理机构 代理人
主权项
地址