| 摘要 |
PURPOSE: A high speed memory system is provided to match a terminal of a memory bus by using a terminal circuit included in a memory device or a chip set, and to reduce an impedance mismatching at a branch by using a line impedance of a memory bus and a stub impedance of a memory module so that it can enhance a high speed bus operation feature. CONSTITUTION: The system comprises a chip set(110), the first and the second memory module connector(150, 160), the first and the second memory module(120, 130), and a bus(170). The chip set(110) is mounted on a circuit board. The first and the second memory module connector(150, 160) are also mounted on the circuit board. The first and the second memory module(120, 130) are inserted into the first and the second memory module connector(150, 160), respectively. The bus(170) is connected to the chip set(110), the first and the second memory module connector(150, 160), and the first and the second memory module(120, 130) via one branch. The first and the second memory module(120, 130) include at least one memory device, respectively, which is connected to the bus(170) via a stub line and a stub resistor. At this time, the impedance of the bus(170) is lower than that of the stub line.
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