发明名称 |
Semiconductor memory device having a circuit for fast operation |
摘要 |
A semiconductor memory device includes a command decoder receiving an external signal and issuing a command, a clock buffer receiving an external clock, gates and a refresh counter. When a test signal is at L-level, an auto-refresh signal is issued in accordance with the output of the command decoder. When the test signal is at H-level, the auto-refresh signal is issued in accordance with the output (external clock) of the clock buffer. Thereby, the test can be performed with a good timing accuracy even by a low-speed tester.
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申请公布号 |
US6614713(B2) |
申请公布日期 |
2003.09.02 |
申请号 |
US20010922670 |
申请日期 |
2001.08.07 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
TANIZAKI TETSUSHI;DOSAKA KATSUMI;ASAKURA MIKIO |
分类号 |
G01R31/28;G06F1/04;G11C11/401;G11C11/406;G11C11/407;G11C29/12;G11C29/48;(IPC1-7):G11C8/00 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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