发明名称 Conductive line formed on integrated circuits
摘要 The present invention relates to a conductive line on an integrated circuit. The integrated circuit includes an insulating layer in which is formed several grooves of predetermined width. The conductive line includes a first interconnection layer having a first thickness and a second interconnection layer having a second thickness. The predetermined width is greater than twice the greatest of the two thicknesses, and smaller than twice the sum of the thicknesses.
申请公布号 US6614114(B2) 申请公布日期 2003.09.02
申请号 US20010865634 申请日期 2001.05.25
申请人 STMICROELECTRONICS S.A. 发明人 GRIS YVON
分类号 H01L21/768;(IPC1-7):H01L23/48 主分类号 H01L21/768
代理机构 代理人
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