Semiconductor memory device

摘要

A DRAM is provided that can reduce the time required for completion of a writing operation on a memory cell so as to speed up a random access cycle. The DRAM includes a sense amplifier driving circuit and a sense amplifier starting signal generation circuit. The sense amplifier starting signal generation circuit changes the timing of a starting signal based on an externally input signal so that the sense amplifier driving circuit activates a driving signal to a sense amplifier at an earlier time for writing than for reading. Write data are transferred to a bit line before the driving signal is activated. Thus, the bit line has a sufficient voltage for writing in the early stages, so that a sufficient charge can be transferred to a storage capacitor in a short time.