发明名称 System LSI chip having a logic part and a memory part
摘要 A dummy pattern layer, which has not been effectively used, included in upper wire layers of a memory part of a system LSI chip is utilized as a large-scale wire TEG (test element group) region while leaving a dummy pattern function. Thus, the system LSI chip is provided with the wire TEG region independent of a product region while keeping the product region.
申请公布号 US6614049(B1) 申请公布日期 2003.09.02
申请号 US20000543545 申请日期 2000.04.05
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 KOYAMA TOHRU
分类号 H01L21/822;H01L23/522;H01L23/544;H01L27/04;H01L27/10;(IPC1-7):H01L23/58;H01L23/48 主分类号 H01L21/822
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