发明名称 INPUT INTERFACE CIRCUIT AND SEMICONDUCTOR DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To reduce a through current to flow in a test mode as much as possible. <P>SOLUTION: An input interface circuit 10 is provided with a P-type MOS transistor P15 connected to the gate terminals of P-type MOS transistors P11 and P12 in a differential comparator circuit DCC. By turning on the MOS transistor P15 in the test mode, the MOS transistors P11 and P12 can be turned off and the through current to flow via the MOS transistors P11 and P12 is cut. Besides, a MOS transistor P14 to function as a resistor in the test mode is connected to a MOS transistor N11. By controlling on/off of the MOS transistor P14, an output signal Q12 of the input interface circuit 10 can be switched to a high level or to a low level. <P>COPYRIGHT: (C)2003,JPO
申请公布号 JP2003243978(A) 申请公布日期 2003.08.29
申请号 JP20020038042 申请日期 2002.02.15
申请人 TOSHIBA CORP 发明人 OTSUKA NOBUAKI
分类号 H01L21/822;H01L21/8238;H01L27/04;H01L27/092;H03K17/16;H03K17/687;H03K19/0175 主分类号 H01L21/822
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