发明名称 PROCESSOR, AND COMPUTATION INSTRUCTION PROCESSING METHOD AND COMPUTATION CONTROL METHOD THEREIN
摘要 PROBLEM TO BE SOLVED: To add new operand designation to SIMD type computation instructions to allow software pipelining between computations executed in parallel with each other in an SIMD computing unit. SOLUTION: A selector for adding operations changing a plurality of outputs of the SIMD computing unit is added to a data bus. A register file is divided in accordance with bit fields of the outputs of the SIMD computing unit. The designation extending over a plurality of registers is added as an output operand of the SIMD instruction. Therefore, a part of the output result of the computation executed in parallel in the SIMD computing unit is allowed to be stored in a register used as an input for another computation, so that the software pipelining is allowed. COPYRIGHT: (C)2003,JPO
申请公布号 JP2003241960(A) 申请公布日期 2003.08.29
申请号 JP20020039106 申请日期 2002.02.15
申请人 HITACHI LTD 发明人 KONDO TAKEKI
分类号 G06F9/38;G06F9/00;G06F9/30;G06F9/302;G06F9/305;G06F9/34;G06F15/16;G06F15/80;(IPC1-7):G06F9/30 主分类号 G06F9/38
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