发明名称 SYNCHRONOUS CIRCUIT
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a synchronous circuit capable of reducing an instantaneous peak current. <P>SOLUTION: In the synchronous circuit that operates in synchronization with a clock signal, at least two clock signals whose operation timings differ each other are generated, and each generated clock signal is supplied to each of a grouped flip-flop circuits. <P>COPYRIGHT: (C)2003,JPO</p>
申请公布号 JP2003241847(A) 申请公布日期 2003.08.29
申请号 JP20020041169 申请日期 2002.02.19
申请人 KAWASAKI MICROELECTRONICS KK 发明人 MAEDA YASUHISA
分类号 G06F1/10;G06F1/12;(IPC1-7):G06F1/10 主分类号 G06F1/10
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