发明名称 POWER SOURCE CONTROL UNIT FOR DRAM
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a power source control unit in which current consumption during standby of a DRAM is reduced. <P>SOLUTION: This unit comprises: a mode detection circuit 4 in which a 'Disable' signal of an L level is reversed to an H level when 'Enable' and the 'Disable' signal is reversed to the H level when 'Disable'; and internal power source driver circuit 6 having a Pch-Tr6a and a Pch-Tr6b; and an internal power source reference circuit 5 in which when the 'Disable' signal of the L level is inputted, a first driver control signal is made to the L level and a second driver control signal is made to the H level, the Pch-Tr6b is turned on, the Pch-Tr6a is turned off, an outer power source VCC is supplied as an internal power source IVC, and when the 'Disable' signal of the H level is inputted, the first driver control signal is made to the H level, the level of the second driver control signal is controlled, the Pch-Tr6b is turned off, the Pch-Tr6a is controlled, and an internal power source IVC1 being lower than the outer voltage VCC is supplied. <P>COPYRIGHT: (C)2003,JPO</p>
申请公布号 JP2003242778(A) 申请公布日期 2003.08.29
申请号 JP20020036262 申请日期 2002.02.14
申请人 OKI ELECTRIC IND CO LTD 发明人 NAGAI WATARU;HIROTA TERUHIRO;SUYAMA JUNICHI
分类号 G11C11/407;G11C7/22;G11C11/4074;(IPC1-7):G11C11/407 主分类号 G11C11/407
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