| 摘要 |
Provided is a symbol data converting circuit for compressing symbol data and suppressing an increase in storage capacity required of a symbol data buffer memory. The circuit includes first and second exponent value calculation circuits for outputting exponent values of the in-phase and quadrature components, respectively, of symbol data; a circuit, to which are input the exponent values of the in-phase and quadrature components of the symbol data output from the first and second exponent value calculation circuits, respectively, for selecting and outputting whichever of the two input exponent values corresponds to the component having the larger absolute value; and first and second shifters for shifting the in-phase and quadrature components, respectively, by an amount equivalent to the selected exponent value, and outputting the shifted in-phase and quadrature components, respectively. The amount of shift for the purpose of normalization is made common for both the in-phase and quadrature components by utilizing the correlation between the in-phase and quadrature components of the symbol data, and the pair of in-phase and quadrature components is converted to one exponent, a mantissa of the in-phase component and a mantissa of the quadrature component, thereby achieving compression of the symbol data.
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