发明名称 |
Dual memory cell |
摘要 |
A memory cell has a first and second conductor. The first conductor is oriented in a first direction and the second conductor is oriented in a second direction. The first conductor has at least one edge. A state-change layer is disposed on the first conductor and a control element is partially offset over the at least one edge of the first conductor. The control element is disposed between the first and second conductors. Preferably the state-change layer is a direct-tunneling or dielectric rupture anti-fuse. A memory array can be formed from a plurality of the memory cells. Optionally, creating multiple layers of the memory cells can form a three-dimensional memory array.
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申请公布号 |
US2003161175(A1) |
申请公布日期 |
2003.08.28 |
申请号 |
US20030371022 |
申请日期 |
2003.02.19 |
申请人 |
FRICKE PETER;VAN BROCKLIN ANDREW L. |
发明人 |
FRICKE PETER;VAN BROCKLIN ANDREW L. |
分类号 |
H01L27/10;G11C16/02;G11C17/16;H01L27/105;H01L27/24;(IPC1-7):G11C17/06 |
主分类号 |
H01L27/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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