METHOD FOR FABRICATING COMPLEMENTARY METAL OXIDE SEMICONDUCTOR TRANSISTOR OF SEMICONDUCTOR DEVICE HAVING HETEROJUNCTION STRUCTURE

摘要

PURPOSE: A method for fabricating a complementary metal oxide semiconductor(CMOS) transistor of a semiconductor device having a heterojunction structure is provided to use a conventional setup for fabricating a CMOS transistor by forming PMOS and NMOS transistors with a heterojunction structure composed of SiGe and Si on the same substrate. CONSTITUTION: The first SiGe layer(22) is formed on a silicon substrate(21). A p-well(23a), an n-well(23b) and an isolation layer(24) are formed in the first SiGe layer. The second SiGe layer(26) is formed on the n-well. A silicon layer(27) is formed on the second SiGe layer and the p-well. A predetermined thickness of the upper portion of the silicon layer is oxidized to form a gate oxide layer through a thermal oxidation process. A gate electrode(29), a gate spacer(31), a source/drain(30) and a silicide layer(32) are formed on the n-well and the p-well.