发明名称 CORRELATION DOUBLE SAMPLING CIRCUIT AND CMOS IMAGE SENSOR PROVIDED THEREWITH
摘要 PROBLEM TO BE SOLVED: To lessen the deviation of a node potential at a reference voltage side due to a reset operation. SOLUTION: A reset signal RST is set to 'H' and then to 'L' to actuate a photodiode D1 to start an integration step according to the intensity of the light. Its detection signal is transferred to a CDS circuit 20. In the circuit 20, an SW 1 and a sampling connection switch 21 are set on to store detection signals as charges in C1 and C2 according to an integration time. After a specified time lapsed, the SW1 and the sampling connection switch 21 are turned off to hold the sampled detection signals. The RST is again set to 'H', the SW1 is set on, then the RST is set to 'L', and the SW1 is turned off to sample and hold the reset noise in the C1, thereby extracting only the signal components of the detection signal. Then an outputting connection switch SW3 and a reading connection switch 22 are turned on to transfer an output voltage signal corresponding to the signal component of the detection signal to an output bus line. COPYRIGHT: (C)2003,JPO
申请公布号 JP2003234962(A) 申请公布日期 2003.08.22
申请号 JP20020030613 申请日期 2002.02.07
申请人 FUJITSU LTD 发明人 KOKUBU MASATOSHI
分类号 H01L27/146;H01L21/00;H01L27/00;H04N5/335;H04N5/357;H04N5/363;H04N5/369;H04N5/374;H04N5/378;(IPC1-7):H04N5/335 主分类号 H01L27/146
代理机构 代理人
主权项
地址