| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To realize a control system in which the variation of the times for writing, erasing and reading data in/from memory cells among rectors in each of semiconductor memory chips are smoothed out and which has high sequential access performance. <P>SOLUTION: A write command is simultaneously inputted to a plurality of memory chips in a first step, an address specifying an address is simultaneously inputted to the plurality of memory chips in a second step, in a third step, one memory is selected out of the plurality of memory chips, one data block and a write start command are inputted to the selected memory chip, and a chip selecting the third step is successively switched. In a fourth step, determination for finish of the write start command and determination for an execution result of a command are performed individually for each memory. <P>COPYRIGHT: (C)2003,JPO</p> |
