发明名称 |
SYSTEM AND METHOD OF MECHANICALLY PLANARIZING SEQUENTIAL BUILDUP BOARD FOR INTEGRATED CIRCUIT PACKAGE |
摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a system and a method of mechanically planarizing a sequential buildup board for integrated circuit packages. <P>SOLUTION: A planarizing plate is settled in contact with a ununiform outer surface of a dielectric layer covering underlying functional circuit elements and filler circuit elements. A heating element on the planarizing plate planarizes protrusive portions of the outer surface of the dielectric layer to form a flat outer surface on the dielectric layer. After cooling the flat outer surface of the dielectric layer, it is covered with a metal conductor layer. This method increases the number of sequential buildup layers capable of being laid on a sequential buildup board. <P>COPYRIGHT: (C)2003,JPO</p> |
申请公布号 |
JP2003234426(A) |
申请公布日期 |
2003.08.22 |
申请号 |
JP20030023489 |
申请日期 |
2003.01.31 |
申请人 |
STMICROELECTRONICS INC |
发明人 |
ANTHONY M CHU;HARRY MICHAEL SIEGEL |
分类号 |
H01L23/12;H01L21/48;H01L21/98;H01L23/538;H01L25/065;H05K3/46;(IPC1-7):H01L23/12 |
主分类号 |
H01L23/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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