发明名称 |
Dielectric recess for wafer-to-wafer and die-to-die metal bonding and method of fabricating the same |
摘要 |
A three-dimensional (3-D) integrated chip system is provided with a first wafer including one or more integrated circuit (IC) devices; a second wafer including one or more integrated circuit (IC) devices; and metallic lines deposited on opposing surfaces of the first and second wafers at designated locations with an interlevel dielectric (ILD) recess surrounding the metallic lines to facilitate direct metal bonding between the first and second wafers and establish electrical connections between active IC devices on the first and second wafers. |
申请公布号 |
US2003157782(A1) |
申请公布日期 |
2003.08.21 |
申请号 |
US20020066645 |
申请日期 |
2002.02.06 |
申请人 |
KELLAR SCOT A.;KIM SARAH E.;LIST R. SCOTT |
发明人 |
KELLAR SCOT A.;KIM SARAH E.;LIST R. SCOTT |
分类号 |
H01L21/30;H01L21/302;H01L21/46;H01L21/461;H01L21/60;H01L21/98;H01L23/48;H01L23/485;H01L25/065;(IPC1-7):H01L21/30 |
主分类号 |
H01L21/30 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|