发明名称 |
INTERCONNECTION OF SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF |
摘要 |
PURPOSE: An interconnection of a semiconductor device and a manufacturing method thereof are provided to improve bit line contact margin by using wet-etching with good selectivity. CONSTITUTION: A gate electrode(23) is formed on a substrate(21) to isolate the substrate through a gate oxide layer(22). A gate cap insulating layer(24) is stacked on the gate electrode. A gate spacer(27) is formed at both sidewalls of the gate electrode. A source/drain region(26) is formed in the substrate to align the gate electrode. A plug layer is formed between the gate electrodes. A bit line(33) is formed to contact the plug layer through an interlayer dielectric(31).
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申请公布号 |
KR100396685(B1) |
申请公布日期 |
2003.08.21 |
申请号 |
KR19960056450 |
申请日期 |
1996.11.22 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
PARK, HYEON |
分类号 |
H01L21/28;(IPC1-7):H01L21/28 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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