发明名称 |
Multi-phase clock transmission circuit and method |
摘要 |
A multi-phase clock transmission circuit includes: a clock generator for generating a clock synchronizing with a reference clock and a control signal responsive to the phase difference between the reference clock and the generated clock; and a delay circuit for generating a multi-phase clock based on the clock and the control signal. The clock generator generates a signal having a frequency equal to an integral multiple of the frequency of the reference clock and outputs the signal as the clock. The delay circuit has a circuit receiving the clock and including a plurality of delay elements in cascade connection each giving a delay according to the control signal to an input signal. Signals output from the plurality of delay elements are used as signals constituting the multi-phase clock.
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申请公布号 |
US2003155953(A1) |
申请公布日期 |
2003.08.21 |
申请号 |
US20030361610 |
申请日期 |
2003.02.11 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
HIRATA TAKASHI;IWATA TORU |
分类号 |
H03K5/13;H03K5/15;H03L7/07;H03L7/08;H03L7/081;(IPC1-7):H03H11/16;H03K3/00 |
主分类号 |
H03K5/13 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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