METHOD FOR OPENING FUSE OF SEMICONDUCTOR DEVICE

摘要

PURPOSE: A method for opening a fuse of a semiconductor device is provided to be capable of reducing etching extent when opening the fuse while flatly forming the surface of a resultant structure having a storage node capacitor by previously removing an insulating layer to a predetermined depth before carrying out a fuse opening process. CONSTITUTION: A planarization insulating layer(250) is formed at the upper portion of a semiconductor substrate(100) having a predetermined structure. The insulating layer formed at a cell region is etched as much as a predetermined depth. Then, a planarization process is carried out on the surface of the insulating layer. A contact hole is formed by selectively etching the insulating layer for exposing a selected conductive region of the resultant structure. After sequentially forming the first metal line(300) and an intermetal dielectric(310) on the resultant structure, a via hole is formed by selectively etching the intermetal dielectric for exposing a selected region of the first metal line. Then, the second metal line(330) is connected with the first metal line through the via hole. After depositing a passivation layer(340) on the resultant structure, a fuse opening process is carried out by selectively etching the resultant structure.