| 摘要 |
A device for controlling memory access in a USB interface. The device includes an interface unit for receiving data from an external source, and a memory control unit coupled to the interface unit. The memory control unit includes a microprocessor unit, a main memory unit and a shared memory unit. The microprocessor unit is capable of storing and retrieving data from the main memory unit. Both the microprocessor unit and the interface unit are capable of storing and retrieving data from the shared memory unit. The device further includes a first bus for coupling the interface unit to the microprocessor; a second bus for coupling the interface unit to the shared memory unit; and bus arbitration logic coupled to both the first bus and the second bus. The bus arbitration logic is operative for allowing the microprocessor to access the main memory unit of the memory control during the time period the interface unit is storing data in, or retrieving data from, the shared memory unit.
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