发明名称 Low-power circuit structures and methods for content addressable memories and random access memories
摘要 A method is provided for associating an address with data. The method includes precharging a matchline connected to a plurality of tag match functions to a first potential, wherein each tag match function comprises one or more match logic devices, discharging two tag lines for a first tag bit to ground, and reading a plurality of tag bits and corresponding data bits onto a plurality of tag lines and a plurality of data lines respectively. The method further includes determining a match between the tag bits and data bits, and pulling the matchline to a second potential upon determining a match for each of the tag bits.
申请公布号 US6608771(B2) 申请公布日期 2003.08.19
申请号 US20010933189 申请日期 2001.08.20
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 JACOBSON HANS M.;KUDVA PRABHAKAR N.;SCHUSTER STANLEY EVERETT;COOK PETER W.
分类号 G11C15/04;(IPC1-7):G11C15/00 主分类号 G11C15/04
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