发明名称 Analog to digital converters with integral sample rate conversion and systems and methods using the same
摘要 An integrated analog to digital and sample rate converter 206 includes sampling circuitry 207 for receiving an analog signal and generating a single or multibit stream of digital signals at a first rate. A leaky integrator filter 208 removes quantization noise from the stream of samples such that resampling can be carried out. Circuitry 209/210 resamples the filtered stream of samples output from leaky integrator filter 208 to generate an output stream of samples at a second rate.
申请公布号 US6608572(B1) 申请公布日期 2003.08.19
申请号 US20010944736 申请日期 2001.08.31
申请人 CIRRUS LOGIC, INC. 发明人 VENKITACHALAM ANAND;WELSER JOE;SOMAN MANOJ;SUBRAMONIAM KRISHNAN
分类号 H03H17/06;(IPC1-7):H03M7/00 主分类号 H03H17/06
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