发明名称 Two-dimensional execution queue for host adapters
摘要 A two-dimensional hardware control block execution queue facilitates multiple command delivery to a single target device over an I/O bus, such as a SCSI bus. The two-dimensional hardware control block execution queue includes a plurality of target queues where each target queue includes at least one hardware control block. Each of target queues is a queue of hardware command blocks, e.g., SCSI control blocks (SCBs) for a specific target device on the I/O bus. There is only one target queue for each target device. One head hardware control block, and only one head hardware control block of each target queue, is included in a common queue. When a selection is made by a host adapter for a target device based upon a hardware control block addressed by a head pointer to the common queue, all hardware control blocks in the target queue within the two-dimensional hardware control block queue, which are accepted by the target device, are transferred to the target device. If there are more hardware control blocks in the target queue than are accepted by the target device, the target queue is moved to the end of two-dimensional queue, and a common queue tail pointer is changed to address the first hardware control block in the moved target queue, and the common queue head pointer is moved to address the first hardware control block in the next target queue with the head hardware control block in the common queue.
申请公布号 US6609161(B1) 申请公布日期 2003.08.19
申请号 US20000587538 申请日期 2000.06.01
申请人 ADAPTEC, INC. 发明人 YOUNG B. ARLEN
分类号 G06F3/00;G06F3/06;G06F13/38;(IPC1-7):G06F3/00 主分类号 G06F3/00
代理机构 代理人
主权项
地址