发明名称 System and method for asynchronously overlapping storage barrier operations with old and new storage operations
摘要 Disclosed is a multiprocessor data processing system that executes loads transactions out of order with respect to a barrier operation. The data processing system includes a memory and a plurality of processors coupled to an interconnect. At least one of the processors includes an instruction sequencing unit for fetching an instruction sequence in program order for execution. The instruction sequence includes a first and a second load instruction and a barrier instruction, which is between the first and second load instructions in the instruction sequence. Also included in the processor is a load/store unit (LSU), which has a load request queue (LRQ) that temporarily buffers load requests associated with the first and second load instructions. The LRQ is coupled to a load request arbitration unit, which selects an order of issuing the load requests from the LRQ. Then a controller issues a load request associated with the second load instruction to memory before completion of a barrier operation associated with the barrier instruction. Alternatively, load requests are issued out-of-order with respect to the program order before or after the barrier instruction. The load request arbitration unit selects the request associated with the second load instruction before a request associated with the first load instruction, and the controller issues the request associated with the second load instruction before the request associated with the first load instruction and before issuing the barrier operation.
申请公布号 US6609192(B1) 申请公布日期 2003.08.19
申请号 US20000588607 申请日期 2000.06.06
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 GUTHRIE GUY LYNN;ARIMILLI RAVI KUMAR;DODSON JOHN STEVEN;WILLIAMS DEREK EDWARD
分类号 G06F9/30;G06F9/312;G06F9/38;G06F9/52;(IPC1-7):G06F9/312 主分类号 G06F9/30
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