| 摘要 |
PROBLEM TO BE SOLVED: To realize a voltage conversion circuit having high noise margin. SOLUTION: A voltage conversion circuit 131 for enhancing the drivability of an nMOS power transistor is disposed between the gate thereof and the output of a latch circuit 123. The voltage conversion circuit 131 is constituted as a CMOS inverter comprising pMOS transistors 134, 137 for buffer, pMOS transistors 135, 138 and nMOS transistors 136, 139. |
