发明名称 MANUFACTURING METHOD FOR SUPERJUNCTION SEMICONDUCTOR ELEMENT
摘要 <P>PROBLEM TO BE SOLVED: To fill a trench by epitaxial growth so as not to leave a void and to eliminate the void in the case that the void remains in manufacturing a semiconductor element having a superjunction structure. <P>SOLUTION: By inclining a trench side wall, and performing the epitaxial growth using a dichlorosilane as a gaseous raw material at the temperature &ge;800&deg;C and &le;1000&deg;C and also by the pressure &ge;1333.22 Pa and &le;13332.2 Pa, the trench is filled with an epitaxial layer 2 so as not to leave the void inside the epitaxial layer 2. Also, even in the case that the trench can not be fully filled by the epitaxial growth, the void inside the trench is eliminated by performing hydrogen reduction atmosphere annealing at the temperature above 900&deg;C after the epitaxial growth. <P>COPYRIGHT: (C)2003,JPO
申请公布号 JP2003229569(A) 申请公布日期 2003.08.15
申请号 JP20020024779 申请日期 2002.01.31
申请人 FUJI ELECTRIC CO LTD;SHIN ETSU HANDOTAI CO LTD 发明人 SHIMIZU AKINORI;KISHIMOTO DAISUKE;UENO KATSUNORI;OKA TETSUSHI
分类号 H01L29/78;H01L21/205;H01L21/336;H01L29/06 主分类号 H01L29/78
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