发明名称 PARALLEL PROCESSING MECHANISM
摘要 PROBLEM TO BE SOLVED: To reduce the man-hours for development and make the operation fast. SOLUTION: A plurality of processing units 21-23, framework means 31a-34a which make the plurality of processing units 21-23 operated in parallel and the shared memory 20a of the plurality of processing units 21-23 are equipped. The framework means 31a-34a separate a received processing request into control information and actual data, the control information communicates to each processing unit 21-23 with a message communicating means and the actual data communicate to each processing unit 21-23 with a shared memory communicating means. COPYRIGHT: (C)2003,JPO
申请公布号 JP2003228554(A) 申请公布日期 2003.08.15
申请号 JP20020024894 申请日期 2002.02.01
申请人 FUJITSU LTD 发明人 DOI SANEHISA
分类号 G06F9/54;G06F15/16;G06F15/167;G06F15/177;(IPC1-7):G06F15/16 主分类号 G06F9/54
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