发明名称 SEMICONDUCTOR STORAGE AND MANUFACTURING METHOD THEREOF
摘要 <P>PROBLEM TO BE SOLVED: To solve the problem of a large cell area in the conventional memory cell utilizing a phase change. <P>SOLUTION: A memory cell structure using a vertical selection transistor and its manufacturing method are proposed, thus achieving a memory cell having area smaller than the conventional DRAM, a phase change memory that can reduce power consumption in read and write operation, and further a phase change memory that has stable read operation. <P>COPYRIGHT: (C)2003,JPO
申请公布号 JP2003229537(A) 申请公布日期 2003.08.15
申请号 JP20020024918 申请日期 2002.02.01
申请人 HITACHI LTD 发明人 MATSUOKA HIDEYUKI;ITO KIYOO;TERAO MOTOYASU;HANZAWA SATORU;SAKATA TAKESHI
分类号 G11C13/00;H01L27/10;H01L27/105;H01L27/24;H01L45/00 主分类号 G11C13/00
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