发明名称 PROCESSING APPARATUS FOR INTEGRATED CIRCUIT ELEMENT
摘要 PROBLEM TO BE SOLVED: To carry out a series of processings at least from a test process to a marking/packaging process by one processing apparatus for an processing apparatus for an integrated circuit. SOLUTION: A measurement stage S4 and a marking stage S7 are provided in conveyance units 2, 3, 4, and 5 for packaging an integrated circuit element conveyed by the conveyance units 2, 3, 4, and 5. COPYRIGHT: (C)2003,JPO
申请公布号 JP2003229339(A) 申请公布日期 2003.08.15
申请号 JP20020029034 申请日期 2002.02.06
申请人 SHIBASOKU:KK 发明人 FURUBIKI SHINKICHI
分类号 H01L21/02;(IPC1-7):H01L21/02 主分类号 H01L21/02
代理机构 代理人
主权项
地址