| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a microprocessor which can eliminate reading out operation and realize lower-power-consumption when a cache memory is not necessary to be read out such as while coprocessor is in execution. <P>SOLUTION: When an execution address is output to the coprocessor 50 from CPU 2, a coprocessor control part 3 intercepts address output from CPU 2 to a cache memory 4, and does not supply address to the cache memory 4. <P>COPYRIGHT: (C)2003,JPO</p> |
