发明名称 CLUTTER SUPPRESSION CIRCUIT FOR RADAR APPARATUS
摘要 <p><P>PROBLEM TO BE SOLVED: To make image display performable, even a target continued long in a distance direction, so as to match with an actual target in a clutter suppression circuit for a radar apparatus in which a cell-averaging log CFAR processing operation is performed to a first received video signal to an n-th received video signal (V<SB>in</SB>=X<SB>1</SB>to X<SB>n</SB>) (where n represents an integer of 2 or more) in one transmission period of the radar apparatus. <P>SOLUTION: The clutter suppression circuit for the radar apparatus is provided with monotonously reducing threshold-value generation means (2, 3, 4) by which a first threshold value to an n-th threshold value with reference to the first received video signal to the n-th received video signal are monotonously reduced as distances used to obtain the first received video signal to the n-th received video signal are away; and a subtraction means (6) by which the first threshold value to the n-th threshold value generated by the monotonously reducing threshold-value generation means are subtracted from the first received video signal to the n-th received video signal so as to output a first subtracted- result signal to an n-th subtracted-result signal. <P>COPYRIGHT: (C)2003,JPO</p>
申请公布号 JP2003227871(A) 申请公布日期 2003.08.15
申请号 JP20020027294 申请日期 2002.02.04
申请人 JAPAN RADIO CO LTD 发明人 KAWAGUCHI MASARU;SAITO TAKASHI
分类号 G01S13/534;G01S7/285;G01S7/32;(IPC1-7):G01S13/534 主分类号 G01S13/534
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