发明名称 |
CIRCUIT AND METHOD FOR DETERMINING THE LOCATION OF DEFECT IN A CIRCUIT |
摘要 |
A method for testing an integrated circuit (IC) for open defects in a printed wire connected to an IC pin of the IC, the method comprises measuring the capacitance of the IC pin; and comparing the value of the measured capacitance to an expected IC pin capacitance value for the pin unconnected, and determining that an open defect exists proximate the pin when the measured capacitance is less than a predetermined value based on the expected IC pin capacitance value. |
申请公布号 |
WO03067941(A2) |
申请公布日期 |
2003.08.14 |
申请号 |
WO2003US01828 |
申请日期 |
2003.01.23 |
申请人 |
LOGICVISION, INC.;SUNTER, STEPHEN, K. |
发明人 |
SUNTER, STEPHEN, K. |
分类号 |
G01R31/11;G01R31/28;G01R31/3185 |
主分类号 |
G01R31/11 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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