INPUT STAGE RESISTANT AGAINST HIGH VOLTAGE SWINGS

摘要

Circuit comprising a signal input (IN) for receiving an input signal s(t) and a digital input stage (15) being designed for operation at a supply voltage (VDD). The input stage (15) comprises CMOS transistors, which are sensitive to voltages across transistor nodes going beyond a voltage limit (Vmax), and an input (IINV). Voltage limiting means (B) being are arranged between the signal input (IN) and the input (IINV). The voltage limiting means (B) comprise an input switch (ns) being controllable by the state of the input signal s(t), and limit voltages at the input (IINV) to the supply voltage (VDD). In addition, means for over-voltage protection (A) are provided between the signal input (IN) and the supply voltage (VDD). The means for over-voltage protection (A) comprise at least one active circuit element being arranged so as to mimic part of a zener function.