KOSTENGÜNSTIGES CMOS TESTGERÄT MIT HOHER KANALDICHTE

摘要

Automatic test equipment for testing semiconductor devices equipment includes a) a clock; b) a delay line comprised of a plurality of delay stages (212), each delay stage (212) having an input and an output and a control input, with the input of the first delay stage (212(0)) coupled to the clock and the input of every other delay stage coupled to the output of the preceding stage in the delay line; said automatic test equipment characterised by: c) a phase detector (214) having a first input coupled to an output of a delay stage in the delay line and in an input coupled to the output of a prior delay stage in the delay line; and d) a control circuit (216) having an input coupled to the output of the phase detector and an output connected to the control inputs of each of the delay stages in the delay line.