发明名称 STACK CHIP PACKAGE
摘要 PURPOSE: A stack chip package is provided to easily guarantee the height of a wire loop of a bonding wire bonded to a lower semiconductor chip and easily control the thickness of the wire loop by mounting an upper semiconductor chip on the lower semiconductor chip while using adhesive including a spacer having a diameter greater than the height of the wire loop. CONSTITUTION: A plurality of semiconductor chips are stacked on a substrate(21). The substrate is electrically connected to the semiconductor chip by wire bonding. The upper semiconductor chip(13) is mounted on the lower semiconductor chip(11) by using the adhesive(61) including the spacer(63) having a diameter greater than the height of the wire loop of the bonding wire(31,33) connected to the lower semiconductor chip. The stack chip package is made of one of silica, polymer or coated metal. The wire bonding may be reverse wire bonding.
申请公布号 KR20030066865(A) 申请公布日期 2003.08.14
申请号 KR20020006448 申请日期 2002.02.05
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 HWANG, SEONG UK;KIM, HYEONG SEOP
分类号 H01L23/28;(IPC1-7):H01L23/28 主分类号 H01L23/28
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