| 摘要 |
A Digital-to-Analog-Converter (DAC) includes an interpolation filter, a modulator, and a time dither clock reduction circuit. The interpolation filter receives the digital data and interpolates and filters the digital data to produce an interpolated and filtered digital signal. The modulator receives the interpolated and filtered digital signal and a feedback signal. The modulator modulates the interpolated and filtered digital signal based upon the feedback signal to produce a modulated signal at a modulator clock rate. The time dither clock reduction circuit receives the modulated signal and applies both clock reduction and time dithering to the modulated signal to produce a time dithered/clock reduced modulated signal. The time dithered/clock reduced modulated signal serves as the analog signal and also serves as the feedback signal. The DAC may be contained in a wireless local area network (WLAN) transceiving integrated circuit that services voice communications in a WLAN with at least one other WLAN device.
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