发明名称 |
Semiconductor device having switch circuit to supply voltage |
摘要 |
A memory cell array has memory cells arranged in a matrix form. The memory cell includes a floating gate and a control gate. Word lines are each coupled to the control gates of the memory cells which are arranged on a corresponding one of the rows in the memory cell array. Bit lines are each coupled to drains of the memory cells which are arranged on a corresponding one of the columns in the memory cell array. An external voltage is supplied from the exterior to an external voltage input terminal. A first voltage generating circuit lowers the external voltage to generate a voltage which is to be supplied to the word line coupled to the control gates. A second voltage generating circuit lowers the external voltage to generate a voltage which is to be supplied to the bit line coupled to the drains. |
申请公布号 |
US2003151945(A1) |
申请公布日期 |
2003.08.14 |
申请号 |
US20020328024 |
申请日期 |
2002.12.26 |
申请人 |
TANZAWA TORU |
发明人 |
TANZAWA TORU |
分类号 |
G11C5/14;G11C16/30;(IPC1-7):G11C11/34;G11C16/04 |
主分类号 |
G11C5/14 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|