Nonvolatile semiconductor memory device capable of writing multilevel data at high rate

摘要

A program data latch circuit supplies one of a write bit line potential and a write prohibiting potential corresponding to multilevel data to be written, to a bit line in accordance with a level of a write control signal in a write operation. On the other hand, a program sense latch circuit compares a threshold value of a memory cell transistor sensed through the bit line with a reference potential, changes the level of the write control signal if the threshold value becomes a value corresponding to the multilevel data and instructs output of the write prohibiting potential in a verification operation.