Method and apparatus for equalizing the digital performance of multiple ADC's

摘要

Method and apparatus for equalizing the digital performance of multiple ADCs includes structure and/or steps for coupling at least one global line between the ADC's resistor ladders to allow current to flow therebetween to balance the reference voltages applied to the comparators of the ADCs. Preferably, the reference voltages are applied equally between the resistor ladders. Even more preferably, the ADC's comparators are located close to each other on a monolithic CMOS circuit.