发明名称 METHOD OF FORMING INTERLAYER DIELECTRIC IN SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE: A method of forming an interlayer dielectric in a semiconductor memory device is provided to prevent fall-down of a metal line formed at the edge of a cell block by reducing step difference of an interlayer dielectric between a cell region and the nearest peripheral region. CONSTITUTION: A storage pole and a plate pole are formed on a cell region for semiconductor memory. A peripheral circuit is formed on a peripheral region. An interlayer dielectric(BPSG)(20) is deposited on the resultant structure. CMP is performed to planarize a portion of the interlayer dielectric in the cell region. A BPSG reflow process is carried out to densify the interlayer dielectric.
申请公布号 KR20030066052(A) 申请公布日期 2003.08.09
申请号 KR20020006206 申请日期 2002.02.04
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 EOM, JUNG SEOP;HUH, CHANG HYEON;JUN, EUN SEONG;KIM, GYEONG HUI;LIM, MIN HWAN
分类号 H01L21/3105;(IPC1-7):H01L21/310 主分类号 H01L21/3105
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