| 摘要 |
<P>PROBLEM TO BE SOLVED: To achieve pull in of a PLL circuit for clock reproduction in a short period of time, to improve the precision of its frequency control, and to obtain a stable clock signal. <P>SOLUTION: Both a phase comparator 1 and a frequency phase comparator 2 are provided, and the comparator 2 is selectively used in the data region of a single period (VFO region of a DVD-RAM for example). <P>COPYRIGHT: (C)2003,JPO |
