DATA CLOCK RECOVERY CIRCUIT

摘要

PROBLEM TO BE SOLVED: To provide a data clock recovery circuit capable of recovery even at a high speed by using data as a clock.

SOLUTION: The data clock recovery circuit is provided with an edge detection circuit 120 using receiver output 107 as the clock and generating edge position information, a clock selection signal generation circuit 121 using the receiver output 107 as the clock and generating a clock selection signal 127 on the basis of the edge position information, a clock selection circuit 122 selecting a recovery clock 110 from a clock group 109 corresponding to the clock selection signal 127, and a synchronizing circuit 124 synchronizing the receiver output 107 by the recovery clock 110 and outputting it as a synchronized data signal 111.

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