发明名称 |
LOGICAL LINE FLOW CONTROL SYSTEM |
摘要 |
PROBLEM TO BE SOLVED: To provide a logical line flow control system capable of facilitating a packet flow control for every logical line even in the case of accommodating a plurality of logical lines in one port, reducing the number of physical lines to an L2 backbone and simplifying a device configuration. SOLUTION: This logical line flow control system for performing the flow control for every logical line is provided with a control part 26 for detecting the occurrence of excessive traffic in the logical line and transmitting a specified pause packet instructing the temporary stoppage of packet transmission to the logical line where the traffic is caused to a LAN multiplexer connected by the logical line, a specified pause packet detection part 25 for detecting whether or not a packet transmitted from an opposing device is the specified pause packet on the basis of an attached destination address, and a tag discrimination part 24 for discriminating which logical line is made correspond to the packet. The control part 26 temporarily stops the packet transmission to the discriminated logical line. COPYRIGHT: (C)2003,JPO
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申请公布号 |
JP2003224574(A) |
申请公布日期 |
2003.08.08 |
申请号 |
JP20020023997 |
申请日期 |
2002.01.31 |
申请人 |
KYUSHU ANDO DENKI KK;ANDO ELECTRIC CO LTD |
发明人 |
TANAKA YUJI;YAMAGUCHI NOBORU |
分类号 |
H04L12/46;(IPC1-7):H04L12/46 |
主分类号 |
H04L12/46 |
代理机构 |
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主权项 |
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地址 |
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